Multiple Choice Questions and Answers on Integrated Circuits

1)   Which among the following is/are the feature/s characteristic/s of an integrated op-amp?

a. Small size
b. High reliability
c. Low cost & less power consumption
d. All of the above

ANSWER: All of the above

2)   In a typical op-amp, which stage is supposed to be a dual-input unbalanced output or single-ended output differential amplifier?

a. Input stage
b. Intermediate stage
c. Output stage
d. Level shifting stage

ANSWER: Intermediate stage

3)   In differential mode of op-amp, if output voltage is equal to the difference between outputs of individual transistors, its amplitude will be _______the amplitude of signal voltage yielded at collector to ground.

a. twice
b. thrice
c. four times
d. one-fourth times

ANSWER: twice

4)   In a differential amplifier, the configuration is said to be an ‘unbalanced output’, if ________

a. Output voltage is measured between two collectors
b. Output is measured with respect to ground
c. Two input signals are used
d. All of the above

ANSWER: Output is measured with respect to ground

5)   Input offset current is basically defined as the algebraic ______ the base current of two transistors.

a. sum of
b. difference between
c. product of
d. division of

ANSWER: difference between

6)   Unipolar belongs to ________technology/ies of integrated circuits.

a. Hybrid
b. Monolithic
c. Both a and b
d. None of the above

ANSWER: Monolithic

7)   Which among the following belong to the category of bipolar technology?

A. JFET
B. MOSFET
C. P-N junction isolation
D. Di-electric isolation

a. A & B
b. B & C
c. C & D
d. A & D

ANSWER: C & D

8)   Which op-amp technology/ies exhibit/s low current sourcing/ sinking capacity?

a. Bipolar op-amp
b. CMOS op-amp
c. BICMOS op-amp
d. All of the above

ANSWER: CMOS op-amp

9)   How many stages are involved in bipolar op-amp?

a. 2
b. 3
c. 4
d. 6

ANSWER: 3

10)   In op-amps, which type of noise occurs due to discrete flow of current in the device?

a. Shot noise
b. Burst noise
c. Thermal noise
d. Flicker noise

ANSWER: Shot noise

11)   Which among the following is a nonlinear application of op-amp?

a. V to I converter
b. Comparator
c. Precision rectifier
d. Instrumentation amplifier

ANSWER: Precision rectifier

12)   What is the feedback factor of voltage follower circuit?

a. Zero
b. Unity
c. Infinity
d. Between zero & one

ANSWER: Unity

13)   For non-inverting adder, which theorem is applicable to determine the expression for output voltage?

a. Thevenin’s
b. Norton’s
c. Miller’s
d. Superposition

ANSWER: Superposition

14)   Which among the following is/are the requirement/s of an instrumentation amplifier?

a. High slew rate
b. High input resistance
c. High CMRR
d. All of the above

ANSWER: All of the above

15)   For a temperature controller circuit comprising instrumentation amplifier, which among the following is adopted as a temperature sensor?

a. Thermistor
b. Sensistor
c. Thyristor
d. Thermocouple

ANSWER: Thermistor

16)   Which parameter/s is/are used to indicate the speed of a comparator?

a. Response Time
b. Propagation Delay
c. Both a and b
d. None of the above

ANSWER: Both a and b

17)   Basically, response time is defined as the time acquired by the comparator to accomplish ______of its transition corresponding to the voltage step at the input.

a. 20%
b. 50%
c. 70%
d. 100%

ANSWER: 50%

18)   For an ideal comparator, what should be the value of the response time?

a. Zero
b. Unity
c. Infinite
d. Unpredictable

ANSWER: Zero

19)   Zero crossing detector circuit plays a crucial role in conversion of input sine wave into a perfect _________at its output.

a. triangular wave
b. square wave
c. saw-tooth wave
d. pulse wave

ANSWER: square wave

20)   For reducing the effects of input offset in comparator, what would be the possible value of input offset voltage?

a. Low
b. Moderate
c. High
d. None of the above

ANSWER: Low

21)   In weighted resistor DAC, how many resistor/s per bit is/are required?

a. One
b. Two
c. Three
d. Four

ANSWER: One

22)   In DAC, resolution increases with the _________ in number of bits.

a. Increase
b. Decrease
c. Constant
d. None of the above

ANSWER: Increase

23)   Which among the following characteristics of D/A converter occur/s due to resistor and semiconductor aging?

a. Speed
b. Settling time
c. Long term drift
d. Supply rejection

ANSWER: Long term drift

24)   In DACs, which type of error/s specify/ies the amount by which the actual output of DAC differ from ideal straight line transfer characteristics?

a. Linearity error
b. Offset error
c. Gain error
d. All of the above

ANSWER: Linearity error

25)   Offset error is basically defined as the non-zero level of analog output especially when all the digital inputs are ____.

a. 0
b. 1
c. Both a and b
d. None of the above

ANSWER: 0

26)   Basically, PLL is used to lock _______

a. Its output frequency
b. Phase to the frequency
c. Phase of the input signal
d. All of the above

ANSWER: All of the above

27)   In communication circuits, PLL is currently applicable for __________

a. Demodulation applications
b. Tracking a carrier or synchronizing signal
c. Both a and b
d. None of the above

ANSWER: Both a and b

28)   In the locked state of PLL, the phase error between the input & output is _________.

a. Maximum
b. Moderate
c. Minimum
d. All of the above

ANSWER: Minimum

29)   Once the phase is locked, the PLL tracks the variation in the input frequency. This indicates that _____

a. Output frequency changes by same amount as that of input frequency
b. Output frequency does not change as that of input frequency
c. There is no relation between input & output frequencies
d. None of the above

ANSWER: Output frequency changes by same amount as that of input frequency

30)   In PLL, the capture range is always _________the lock range.

a. Greater than
b. Equal to
c. Less than
d. None of the above

ANSWER: Less than

31)   Which among the following factors affect/s the output voltage of a regulated power supply?

a. Load current
b. Input voltage
c. Temperature
d. All of the above

ANSWER: All of the above

32)   Which performance parameter of a regulator is defined as the change in regulated load voltage due to variation in line voltage in a specified range at a constant load current?

a. Load regulation
b. Line regulation
c. Temperature stability factor
d. Ripple rejection

ANSWER: Line regulation

33)   The % load regulation of a power supply should be ideally ________ & practically _______.

a. zero, small
b. small, zero
c. zero, large
d. large, zero

ANSWER: zero, small

34)   Switching regulators are series type regulators, which has ______ power dissipation & ______ efficiency.

a. increased, increased
b. increased, reduced
c. reduced, increased
d. reduced, reduced

ANSWER: reduced, increased

35)   In a linear IC voltage regulator, series pass transistor always operates in ______ region.

a. Active
b. Saturation
c. Cut-off
d. All of the above

ANSWER: Active

36)   Which among the following compression techniques is/are intended for still images?

a. JPEG
b. H.263
c. MPEG
d. All of the above

ANSWER: JPEG

37)   Which lossy method for audio compression is responsible for encoding the difference between two consecutive samples?

a. Silence Compression
b. Linear Predictive Coding (LPC)
c. Adaptive Differential Pulse Code modulation (ADPCM)
d. Code Excited Linear Predictor (CELP)

ANSWER: Adaptive Differential Pulse Code modulation (ADPCM)

38)   Which coding technique/s exhibit/s the usability of fixed length codes?

a. Lempel Ziv
b. Huffman
c. Both a and b
d. None of the above

ANSWER: Lempel Ziv

39)   Which among the following is used to construct the binary code that satisfies the prefix condition?

a. Information Rate
b. Noiseless Channel
c. Channel Coding Theorem
d. Kraft Inequality

ANSWER: Kraft Inequality

40)   Information rate basically gives an idea about the generated information per _____ by source.

a. Second
b. Minute
c. Hour
d. None of the above

ANSWER: Second

41)   Which approach plays a cardinal role in supporting the results obtained regarding the information capacity theorem?

a. Line Packing
b. Volume Packing
c. Sphere Packing
d. All of the above

ANSWER: Sphere Packing

42)   In sphere packing, where is the received code vector with added noise located?

a. Inside the sphere
b. Outside the sphere
c. On the boundary (circumference) of sphere
d. All of the above

ANSWER: Inside the sphere

43)   If a noiseless channel bandlimited to 5 kHz is sampled every 1msec, what will be the value of sampling frequency?

a. 250 samples/sec
b. 500 samples/sec
c. 800 samples/sec
d. 1000 samples/sec

ANSWER: 1000 samples/sec

44)   Assuming that the channel is noiseless, if TV channels are 8 kHz wide with the bits/sample = 3Hz and signalling rate = 16 x 106 samples/second, then what would be the value of data rate?

a. 16 Mbps
b. 24 Mbps
c. 48 Mbps
d. 64 Mbps

ANSWER: 48 Mbps

45)   On which factor/s do/does the channel capacity depend/s in the communication system?

a. Bandwidth
b. Signal to Noise Ratio
c. Both a and b
d. None of the above

ANSWER: Both a and b

46)   Which amount the following is capable of correcting any combination of three or fewer errors random errors in a block of 23 bits?

a. Hamming codes
b. Interleaved code
c. Repetition codes
d. Golay code

ANSWER: Golay code

47)   For a (6,4) block code where n = 6, k = 4 and dmin = 3, how many errors can be corrected by this code?

a. 0
b. 1
c. 2
d. 3

ANSWER: 1

48)   In Repetition Code, how many information bit/s is/are present in addition to n-1 parity bits?

a. One
b. Two
c. Four
d. Eight

ANSWER: One

49)   On which factor/s do/does the error probability depend/s after decoding?

a. Number of error vectors
b. Error probability of symbol transmission
c. Both a and b
d. None of the above

ANSWER: Both a and b

50)   Which buffer size is required by the interleaved codes at the transmitter for the accumulation of λ code words?

a. Small
b. Medium
c. Large
d. All of the above

ANSWER: Large

51)   For the generation of a cyclic code, the generator polynomial should be the factor of _____

a. xn + 1
b. xn – 1
c. xn /2
d. x2n/3

ANSWER: xn + 1

52)   Consider the assertions related to decoding process of cyclic code. Which among the following is a correct sequence of steps necessary for the correction of errors?

A. Syndrome determination after the division of r(x) & g(x)
B. Addition of error pattern to received code word
C. Selection of error pattern corresponding to the syndrome
D. Preparation of table comprising error patterns and syndromes

a. A, B, C, D
b. B, A, D, C
c. C, B, D, A
d. D, A, C, B

ANSWER: D, A, C, B

53)   Which among the below stated logical circuits are present in encoder and decoder used for the implementation of cyclic codes?

A. Shift Registers
B. Modulo-2 Adders
C. Counters
D. Multiplexers

a. A & B
b. C & D
c. A & C
d. B & D

ANSWER: A & B

54)   Which among the following error detecting technique is supposed to be parity bit associated with character code?

a. LRC
b. VRC
c. Both a and b
d. None of the above

ANSWER: VRC

55)   In register contents at decoder, the syndrome register consists of syndrome after all bits of received vector are clocked into the decoder ________.

a. Input
b. Output
c. Both a and b
d. None of the above

ANSWER: Input

56)   If the errors are corrected at _______end/s, it is known as ‘Forward Error Correction’ (FEC).

a. Transmitter
b. Receiver
c. Both a and b
d. None of the above

ANSWER: Receiver

57)   In Frame Check Sequence (FCS), which code is used if character length is 6 bit and generates 12 bit parity check bits?

a. CRC-12
b. CRC-16
c. CRC-32
d. CRC-CCITT

ANSWER: CRC-12

58)   Decoding of RS code comprises the determination of error _______

A. position
B. magnitude
C. angle
D. frequency

a. A & B
b. C & D
c. A & C
d. B & D

ANSWER: A & B

59)   In RS code, the length is ____less than number of symbols in symbol set (q).

a. One
b. Two
c. Three
d. Infinite

ANSWER: One

60)   In Minimum Distance Separable (MDS) codes, the minimum distance is one more than the number of _________.

a. Information bits
b. Symbol bits
c. Parity check bits
d. None of the above

ANSWER: Parity check bits

61)   In Trellis diagram, what do/does the horizontal axis represent/s?

a. Continuous time
b. Discrete time
c. Sampled time
d. All of the above

ANSWER: Discrete time

62)   For the 4 states of an encoder on vertical axis of Trellis diagram, what do/does the solid line indicate/s?

a. ‘0’ input
b. ‘1’ input
c. Both a and b
d. None of the above

ANSWER: ‘0’ input

63)   Which decoding method involves the evaluation by means of Fano Algorithm?

a. Maximum Likelihood Decoding
b. Sequential Decoding
c. Both a and b
d. None of the above

ANSWER: Sequential Decoding

64)   For a received sequence of 6 bits, which decoding mechanism deals with the selection of best correlated sequence especially by correlating the received sequence and all permissible sequences?

a. Soft Decision Decoding
b. Hard Decision Decoding
c. Both a and b
d. None of the above

ANSWER: Soft Decision Decoding

65)   To obtain the transfer function of a convolutional code, the splitting of all-zero state takes place into ___

A. starting state
B. first return to all-zero state
C. in-between state

a. A & B
b. B & C
c. A & C
d. None of the above

ANSWER: A & B

66)   The distance between each symbol in given sequence and reference sequence is known as _______.

a. Euclidean Distance
b. Distance between sequences
c. Manmattan Distance
d. Hamming Distance

ANSWER: Distance between sequences

67)   dfree is defined as the Euclidean distance of coded signal in terms of _________ possible distance between all allowed sequences.

a. smallest
b. largest
c. average
d. constant

ANSWER: smallest

68)   For designing trellis code, the emphasis must be on maximizing __________

a. Euclidean distance between code vectors
b. Hamming distance of error correcting codes
c. Both a and b
d. None of the above

ANSWER: Euclidean distance between code vectors

69)   For designing a communication system, which among the following parameters should be maximum?

A. Transmission rate
B. Received signal-to-noise ratio
C. Error probability
D. Bandwidth requirement

a. A & B
b. C & D
c. A & C
d. B & D

ANSWER: A & B

70)   For fixed symbol rate, increase in bits/symbol ultimately improves rb/B bits/s/Hz & hence, regarded as _____.

a. Power efficiency
b. Spectral efficiency
c. Transmission efficiency
d. Modulation efficiency

ANSWER: Spectral efficiency