Solved Problems on Transistor Biasing

Q1. An npn silicon transistor has V_CC = 6 V and the collector load R_C = 2.5 kΩ. Find : (i) The maximum collector current that can be allowed during the application of signal for faithful amplification. (ii) The minimum zero signal collector current required.

Solution :

Fig.1

Collector supply voltage, V_CC = 6 V
Collector load, R_C = 2.5 kΩ
(i) We know that for faithful amplification, V_CE should not be less than 1V for silicon transistor.
∴      Max. voltage allowed across R_C = 6 − 1 = 5 V
∴      Max. allowed collector current = 5 V/R_C = 5 V/2.5 kΩ = 2 mA

Thus, the maximum collector current allowed during any part of the signal is 2 mA. If the collector current is allowed to rise above this value, V_CE will fall below 1 V. Consequently, value of β will fall, resulting in unfaithful amplification.

(ii) During the negative peak of the signal, collector current can at the most be allowed to become zero. As the negative and positive half cycles of the signal are equal, therefore, the change in collector current due to these will also be equal but in opposite direction.

∴       Minimum zero signal collector current required = 2 mA/2 = 1 mA

During the positive peak of the signal [point A in Fig. 1(ii)], i_C = 1 + 1 = 2mA

And during the negative peak (point B), i_C = 1 − 1 = 0 mA

Q2. A transistor employs a 4 kΩ load and V_CC = 13V. What is the maximum input signal if β = 100 ? Given V_knee = 1V and a change of 1V in V_BE causes a change of 5mA in collector current.

Solution :

Collector supply voltage, V_CC  = 13 V
Knee voltage, V_knee = 1 V
Collector load, R_C = 4 kΩ
∴       Max. allowed voltage across R_C = 13 − 1 = 12 V
∴       Max. allowed collector current, i_C  =12 V /R_C = 12 V/ 4 KΩ = 3 mA

Maximum base current, i_B = i_C / β = 3 mA / 100 = 30 μA

Now Collector current / Base voltage (signal voltage) = 5 mA/V

∴  Base voltage (signal voltage) = Collector current / (5 mA/V )= 3 mA /( 5 mA/V) = 600 mV

Q3. Fig. 2 (i) shows biasing with base resistor method. (i) Determine the collector current I_C and collector-emitter voltage V_CE . Neglect small base-emitter voltage. Given that β = 50. (ii) If R_B in this circuit is changed to 50 kΩ, find the new operating point.

Solution :

Fig. 2

In the circuit shown in Fig. 2 (i), biasing is provided by a battery V_BB (= 2V) in the base circuit which is separate from the battery V_CC (= 9V) used in the output circuit.

The same circuit is shown in a simplified way in Fig. 2 (ii). Here, we need show only the supply voltages, + 2V and +9V. It may be noted that negative terminals of the power supplies are grounded to get a complete path of current.

(i) Referring to Fig.2 (ii) and applying Kirchhoff ’s voltage law to the circuit ABEN, we get,

(ii) When R_B is made equal to 50 kΩ, then it is easy to see that base current is doubled i.e. I_B = 40 μA.

Q4. Fig. 3 (i) shows that a silicon transistor with β = 100 is biased by base resistor method. Draw the d.c. load line and determine the operating point. What is the stability factor ?

Solution :

Fig. 3

Here, V_CC = 6 V, R_B = 530 kΩ, R_C = 2 kΩ

D.C. load line

Referring to Fig. 3 (i), V_CE = V_CC − I_CR_C

When I_C = 0, V_CE = V_CC = 6 V. This locates the first point B (OB = 6V) of the load line on collector-emitter voltage axis as shown in Fig. 3 (ii).

When V_CE = 0,   I_C = V_CC/R_C = 6V/2 kΩ = 3 mA.

This locates the second point A (OA = 3mA) of the load line on the collector current axis. By joining points A and B, d.c. load line AB is constructed as shown in Fig. 3(ii).

Operating point Q

As it is a silicon transistor, therefore, V_BE = 0.7V. Referring to Fig. 3(i), it is clear that :

Fig. 3 (ii) shows the operating point Q on the d.c. load line. Its co-ordinates are I_C = 1mA and V_CE = 4V.

Q5. (i) A germanium transistor is to be operated at zero signal I_C  = 1mA. If the
collector supply V_CC = 12V, what is the value of R_B in the base resistor method ? Take β = 100.
(ii) If another transistor of the same batch with β = 50 is used, what will be the new value of zero signal I_C for the same R_B ?

Solution :

                          Given,   V_CC = 12 V, β = 100

As it is a Ge transistor, therefore, V_BE = 0.3 V

(i)     Zero signal I_C = 1 mA

(ii)  Now β = 50

Q6. Calculate the values of three currents in the circuit shown in Fig. 4.

Fig. 4

Solution :

Applying Kirchhoff ‘s voltage law to the base side and taking resistances in kΩ and currents in mA, we have,

 

 

Q7. Design base resistor bias circuit for a CE amplifier such that operating point is V_CE = 8V and I_C = 2 mA. You are supplied with a fixed 15V d.c. supply and a silicon transistor with β = 100. Take base-emitter voltage V_BE = 0.6V. Calculate also the value of load resistance that would be employed.

Solution :

Fig. 5 shows CE amplifier using base resistor method of biasing.

Fig. 5

Q8. A base bias circuit in Fig. 6 is subjected to an increase in temperature from 25°C
to 75°C. If β = 100 at 25°C and 150 at 75°C, determine the percentage change in Q-point values ( V_CE and I_C) over this temperature range. Neglect any change in V_BE and the effects of any leakage current.

Fig 6

Solution :

At 25°C :

At 75 °C :

Q9. In base bias method, how Q-point is affected by changes in V_BE and I_CBO.

Solution :

In addition to being affected by change in β, the Q-point is also affected by changes in V_BE and I_CBO in the base bias method.

(i) Effect of V_BE :

The base-emitter-voltage V_BE decreases with the increase in temperature (and vice-versa). The expression for I_B in base bias method is given by ;

It is clear that decrease in V_BE increases I_B . This will shift the Q-point (I_C  = βI_B  and V_CE = V_CC – I_C R_C). The effect of change in V_BE is negligible if V_CC >> V_BE (V_CC atleast 10 times greater than V_BE).

(ii) Effect of I_CBO :

The reverse leakage current I_CBO has the effect of decreasing the net base current and thus increasing the base voltage. It is because the flow of I_CBO creates a voltage drop across R_B that adds to the base voltage as shown in Fig. 7. Therefore, change in I_CBO shifts the Q-point of the base bias circuit.

Fig. 7

However, in modern transistors, I_CBO is usually less than 100 nA and its effect on the bias is negligible if V_BB >> I_CBO R_B.

Q10. Fig. 8 (i) shows the base resistor transistor circuit. The device (i.e. transistor)
has the characteristics shown in Fig. 8 (ii). Determine V_CC, R_C and R_B .

Fig. 8

Solution :

From the d.c load line, V_CC = 20V.

Q11. What fault is indicated in (i) Fig. 9 (i) and (ii) Fig. 9 (ii) ?

Fig. 9

Solution :

(i) The obvious fault in Fig. 9(i) is that the base is internally open. It is because 3V at the base and 9V at the collector mean that transistor is in cut-off state.
(ii) The obvious fault in Fig. 9 (ii) is that collector is internally open. The voltage at the base is correct. The voltage of 9V appears at the collector because the ‘open’ prevents collector current.

Q12. For the emitter bias circuit shown in Fig. 10, find I_E, I_C, VC and V_C and V_CE for β= 85 and V_BE = 0.7V.

Fig. 10

Solution :

Q13. Determine how much the Q-point in Fig. 11 will change over a temperature range where β increases from 85 to 100 and V_{BE ,}decreases from 0.7V to 0.6V.

Fig. 11

Solution :

For β = 85 and V_BE = 0.7V

As calculated in the above Question.12, IC = 1.73 mA and VCE = 14.6V.

For β = 100 and VBE = 0.6V

Q14. Fig. 12 shows a silicon transistor biased by collector feedback resistor method.
Determine the operating point. Given that β = 100.

Fig. 12

Solution :

V_CC = 20V, R_B = 100 kΩ, R_C = 1kΩ

Since it is a silicon transistor, V_BE = 0.7 V.

Assuming I_B to be in mA and using the relation,

Q15. (i) It is required to set the operating point by biasing with collector feedback
resistor at I_C = 1mA, V_CE  = 8V. If β = 100, V_CC = 12V, V_BE = 0.3V, how will you do it ?
(ii) What will be the new operating point if β = 50, all other circuit values remaining the same ?

Solution :

Given, V_CC  = 12V, V_CE = 8V, I_C = 1mA, β = 100, VBE = 0.3V

(i) To obtain the required operating point, we should find the value of R_B.

Now, collector load is

(ii) Now β = 50, and other circuit values remain the same.

Q16. It is desired to set the operating point at 2V, 1mA by biasing a silicon transistor with collector feedback resistor R_B. If β = 100, find the value of R_B.

Solution :

Fig. 13

Q17. Find the Q-point values ( I_C and V_CE) for the collector feedback bias circuit shown in Fig. 14.

Fig. 14

Solution :

Fig. 14 shows the currents in the three resistors (R_C, R_B and R_E) in the circuit. By following the path through V_CC , R_C, R_B, V_BE and R_E and applying Kirchhoff’s voltage law, we have,

Q18. Find the d.c. bias values for the collector-feedback biasing circuit shown in Fig. 15. How does the circuit maintain a stable Q point against temperature variations ?

Fig.15

Solution :

The collector current is

Stability of Q-point :

We know that β varies directly with temperature and V_BE varies inversely with temperature. As the temperature
goes up, β goes up and V_BE goes down. The increase in β increases I_C (= βI_B). The decrease in V_BE increases I_B which in turn increases I_C . As I_C tries to increase, the voltage drop across R_C (= I_C R_C ) also tries to increases. This tends to reduce collector voltage V_C  and, therefore, the voltage across R_B. The reduced voltage across R_B reduces I_B and offsets the attempted increase in I_C  and attempted decrease in V_C . The result is that the collector feedback circuit maintains a stable Q-point. The reverse action occurs when the temperature decreases.

Q19. Fig. 16 shows the voltage divider bias method. Draw the d.c. load line and determine the operating point. Assume the transistor to be of silicon.

Fig. 16

Solution :

d.c. load line :

The collector-emitter voltage V_CE is given by :

This locates the second point A (OA = 5 mA) of the load line on the collector current axis. By joining points A and B, the d.c. load line AB is constructed as shown in Fig. 17.

Fig. 17

Operating point :

For silicon transistor, V_BE = 0.7 V

Fig.17 shows the operating point Q on the load line. Its co-ordinates are I_C = 2.15 mA, V_CE = 8.55 V.

Q20. Calculate the emitter current in the voltage divider circuit shown in Fig. 18.
Also find the value of V_CE and collector potential V_C.

Fig. 18

Solution :

Q21. For the circuit shown in Fig. 19, find the operating point. What is the stability factor of the circuit ? Given that β = 50 and V_BE = 0.7V.

Fig. 19

Solution :

Fig. 19 shows the circuit of potential divider bias and Fig. 20 shows it with potential divider circuit replaced by Thevenin’s equivalent circuit.

Fig. 20

Q22. The circuit shown in Fig. 21 uses silicon transistor having β = 100. Find the operating point and stability factor.

Fig. 21

Solution :

Fig. 21 shows the circuit of potential divider bias and  Fig. 22 shows it with potential divider circuit replaced by Thevenin’s equivalent circuit.

Fig. 22

Q23. In the circuit shown in Fig. 23, the operating point is chosen such that I_C = 2mA, V_CE = 3V. If R_C = 2.2 kΩ, V_CC = 9V and β = 50, determine the values of R1, R2 and R_E. Take V_BE = 0.3V and I1 = 10I_B .

Fig. 23

Solution :

Given, R_C = 2.2 kΩ, V_CC = 9V and β = 50,  V_BE = 0.3V and I1 = 10I_B .

As I_B is very small as compared to I1, therefore, we can assume with reasonable accuracy that I1 flowing through R1 also flows through R2.

Applying Kirchhoff ‘s voltage law to the collector side of the circuit, we get,

Q24. An npn transistor circuit as shown in Fig. 24 has α = 0.985 and V_BE = 0.3V. If V_CC =16V, calculate R1 and R_C to place Q point at I_C = 2mA,V_CE = 6 volts.

Fig. 24

Solution :

Given, α = 0.985 , V_BE = 0.3V and V_CC =16V